Clock generation circuits can be used to clock synchronous circuits, such as analog-to-digital converters (ADCs). A clock generation circuit provides one or more repetitive clock signals, each having a constant period, also referred to herein as periodic signals. When used to clock switched capacitor circuits within an analog-to-digital converter, the clock generation circuit generates non-overlapping clock signals to reduce charge transfer induced errors in the output voltage of a switched capacitor circuit.
Two clock signals are non-overlapping with respect to each other if only one of the clock signals is high at any given time. In other words, if two non-overlapping clock signals are viewed on the same time axis, the repetitive clock pulses of the respective signals never overlap and are always separated, in time, from one another.
As analog-to-digital converter technology improves, clock generation circuits must be developed to generate the required non-overlapping clock signals used by the switched capacitor circuits within the analog-to-digital converters.
The present invention is illustrated by way of example, and its not limited by the accompanying figures, in which like references indicate similar elements. Skilled artisans will appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of embodiments of the present invention.
The apparatus and method components have been represented where appropriate by conventional symbols in the drawings, showing only those specific details that are pertinent to understanding the embodiments of the present invention so as not to obscure the disclosure with details that will be readily apparent to those of ordinary skill in the art having the benefit of the description herein.